zHISR

The zHISR architecture comprises several key components designed for efficient performance analysis on z/OS. The data collector retrieves performance data from the System z CPU Measurement Facility (CPU MF) and z/OS Hardware Instrumentation Services (HIS). This component is responsible for accessing and extracting the raw performance metrics.

The analysis engine processes the collected data, performing calculations and identifying performance bottlenecks. It uses algorithms to analyze CPU usage by application, address space, and program. The reporting module generates detailed reports, which can be customized through configuration files.

These reports provide insights into CPU consumption, resource utilization, and application performance. Communication between components is primarily through data sets and control blocks within the z/OS environment. The data collector writes raw data to intermediate datasets, which the analysis engine reads.

The analysis engine then writes processed data to reporting datasets. The system utilizes standard z/OS file systems for data storage. There are no specific network ports required, as the components communicate within the z/OS environment.

The architecture is designed to integrate seamlessly with the z/OS system, leveraging existing infrastructure for data collection, processing, and reporting. The primary interface for interaction is through JCL jobs, which specify input datasets, report parameters, and output destinations.